Increasing efficiency of switching-type regulator circuits



United States Patent INCREASING EFFICIENCY OF SWITCHING- TYPE REGULATORCIRCUITS William M. Clapp, Nashua, N.H., asslgnor, by mesne asslgnments,to the United States of America as represented by the NationalAeronautics and Space Administration Filed July 13, 1966, Ser. No.564,919

6 Claims. (Cl. 323-42) ABSTRACT OF THE DISCLOSURE Constant voltage isapplied to a load from a regulated power supply via a transistor switchin series connection with the primary winding of a transformer whichdirectly couples the switch between the source and the load. A gatingcontrol network for the transistor series switch is connected by thetransformer secondary to provide a DC path so that substantially all thecurrent applied to the control network from the input power source isfed to the load. The control network includes a Schmitt trigger which,with its input connected across the load, selectively drives theemitter-collector path of the SWilChlllg transistor between conductingand nonconducttng states with periods varying in response to themagnitude of the input voltage applied thereto. The voltage across theswitching transistor when it is conducting remains substantiallyconstant despite variations in load current since the current in thecontrol network is responsive to load current. The transformer inductivenetwork functions as a current transformer to supply load current to thegating network. Efiiciency is increased since the control network is inseries with the source and the load.

The invention described herein was made in the performance of work undera NASA contract and is subject to the provisions of Section 305 of theNational Aeronautics and Space Act of 1958, Public Law 85-568 (72 Stat.435; U.S.C. 2457).

The present invention relates generally to switching series regulatorsand more particularly to a switching series regulator having a gatingcontrol network, wherein substantially all of the current supplied tothe control network from an input power source is coupled to the load.

Many prior art switching series regulators exist wherein the periodduring which current is supplied to a load from a source is variable,depending upon the load voltage magnitude. Generally, the prior artdevices require control networks for the transistor or vacuum tubeswitching element. The control networks are usually connected to thesource supplying power to the load and draw considerable amounts ofpower from the source. In addition to the current supplied to thecontrol circuit by the source, the control network absorbs anddissipates a relatively large amount of power due to heating ofresistive elements. The heat dissipated by the resisitive elements, intransistor devices, must be removed from the regulator by means of bulkyheat sinks, in order for the transistors to operate in a stable manner.

According to the present invention, the eflicicncy of transistorswitching series regulators is increased, while the need for heat sinksis obviated, by connecting the control circuit for the transistor seriesswitch in a manner so that substantially all of the current applied tothe control circuit is fed to the load via an inductive network.

Etliciency is increased since the control network is in series with thesource and load, rather than being in shunt with the source, wherebyenergization current for the control network is fed to the load ratherthan being diverted from it. Because the control network is inductivelycoupled 3,417,321 Patented Dec. 17, 1968 with the load, a low D.C.impedance is presented to the output terminals of the control network.of course, the low D.C. load impedance minimizes the heat dissipationthat is associated with resistive loads.

A further feature of the invention is that the saturation voltagebetween the emitter and collector of the main switching seriestransistor is maintained substantially constant during each intervalwhen the transistor is switched into a conducting state, regardless of acurrent being drawn by the load. The voltage across the switchingtransistor is maintained constant because the current in the gatingcontrol network varies as a function of load current. The gating controlnetwork current is controlled in response to the load current becausethe inductive network functions as a current transformer for supplyingthe load current to the gating network. Hence, as the load currentincreases, the current in the gating control network increases, wherebythe control network derives a variable bias level for the main switchingtransistor. The bias voltage for the main switching transistor is suchthat as the load current increases, the main switching transistor isforward biased to a greater extent and the emitter collector impedanceof the main switching transistor is decreased. The decrease in theemitter collector impedance of the main switching transistor is suchthat the voltage across the transistor remains substantially constant asthe load current increases.

It is, accordingly, an object of the present invention to provide a newand improved series regulator of the switching type.

Another object of the invention is to provide a switching regulatorhaving an efiiciency in excess of percent.

Still another object of the present invention is to provide a new andimproved high efiiciency series switching regulator having a controlnetwork that feeds substantially all the current supplied to it to theload.

An additional object of the present invention is to provide a new andimproved switching series-type regulator wherein power dissipationassociated with resistive losses is minimized.

A further object of the present invention is to provide a switching-typeregulator, of the series type wherein the need for heat sinks isobviated.

It is still another object of the present invention to provide a new andimproved transistor series switching regulator, wherein the voltageacross the switching transistor. when it is in the conducting state,remains substantially constant despite variations in load current.

Still an additional object of the present invention is to provide atransistorized series switching regulator wherein transistor operationis stabilized by minimizing heat dissipation without the need for bulkyheat sinks, to reduce the size and expense of the regulator.

The above and still further objects, features and advantages of thepresent invention will become apparent upon consideration of thefollowing detailed description of one specific embodiment thereof,especially when taken in conjunction with the accompanying drawings,wherein:

FIG. I is a circuit diagram of a typical prior art switching seriesregulator;

FIG. 2 is a circuit diagram of a series switching regulator according toa preferred embodiment of the present invention; and

FIG. 3 is a circuit diagram ofa series switching regulator accordingtoanother embodiment of the present invention.

' Reference is now madeto' FIG. 1 of the drawings wherein the negativeterminal 11 of D.C. power supply 12 is illustrated as being connected toload 13 through the emitter collector path of series switchingtransistor 14, which isot the NPN type. Connected in series with thecollector of transistor 14 ancl load 13 is smoothing induc- 3 tor 15,which is shunted on either side by diode 16 and smoothing capacitor 17.The anode of diode 16 is connccted to the junction between the collectorof transistor 14 and one terminal of inductance to provide a dischargepath for the current stored in inductance 15 when transistor 14 is cutoff.

The emitter collector path of transistor 14 is alternately driven toconducting saturated and non-conducting states by a transistorizedgating network including NPN transistor 18. The emitter of gatingcontrol transistor18 is directly coupled to the base of transistor 14and is loaded by resistor 19, connected between the emitter and base oftransistor 14. The emitter collector energization path for transistor 18is completed from the negative terminal 11 of source 12 via resistor 19and resistor 21, connected between the collector of transistor 18 andground. Negative bias potential is applied to the base of transistor 18from the negative terminal 11 of D.C. power supply 12 via resistor 22,connected between the base of transistor 18 and the negative terminal.

To control the conducting durations of transistors 14 and 18, voltage toduty-cycle circuit 23 has its input connected across load 13 andsmoothing capacitor 17 and supplies its output to the base of transistor18. Voltage to duty-cycle circuit 23 is of the conventional type, e.g. aSchmitt trigger, whereby it derives a rectangular wave output havingalternate periods controlled in response to the voltage across load 13.The period of the positive and negative portions of each cycle of thewave derived by network 23 is variable in response to the magnitude ofthe input voltage applied to the circuit. in particular, as the inputvoltage applied to circuit 23 increases and decreases, in a negativemanner, the period of the positive portion of each cycle decreases andincreases, respectively, while the negative portion of each cycleremains constant. Hence, in response to the voltage across load 13increasing, because the load impedance increases or the voltage ofsource 12 becomes greater, circuit 23 drives transistor 18 into aconducting state for a smaller time interval during each cycle of thefixed frequency output of circuit 23. in response to circuit 23 drivingtransistor 18 into a conducting state, whereby the negative bias appliedto the transistor base via resistor 22 is overcome, negative currentflows from terminal 11 through resistor 19, the emitter collector pathof transistor 18 and resistor 21 to ground. Through the voltage drops oftransistor 18 and resistor 21, a positive voltage is developed at thebase of transistor 14, relative to the transistor emitter to forwardbias transistor 14 into heavy conduction.

in response to series switching transistor 14 being forward biased, apulse of D.C. current is applied by source 12 to load 13 through theswitching transistor and inductance 15. The pulse of negative D.C.current does not flow through diode 16 since the diode is back biased inresponse to the negative voltage applied to its anode by the collectorof transistor 14. While transistors 14 and 18 are forward biased, source12 applies a significant amount of current through the latter transistorto resistor 21, wherein heating due to PR power dissipation occurs.

In response to the pulse of current from D.C. source 12, the voltageacross load 13 increases, in a negative exponential manner, until thefiring voltage of circuit 23 is attained. in response to the firinglevel of circuit 23 being reached, the circuit derives a negativevoltage that is applied to the base of transistor 18. The negativevoltage level applied by circuit 23 to the base of transistor 18 drivesthe emitter collector path of the transistor into a cut-off condition.In response to the emitter collector path of transistor 18 being drivento cut-off, the base and emitter voltage of transistor 14 is decreasedsubstantially to zero whereby the emitter collector path of the lattertransistor is cut off. In response to the cut-off condition oftransistor 14, the voltage across inductance l5 reverses in phasewhereby negative current is supplied path of diode 16. The voltagesupplied by inductance 15 to load 13 decreases in an exponential manneruntil the fixed duration negative portion of the duty-cycle of network23 has elapsed. In response to the completion of the negative portion ofthe duty-cycle of network 23, the network derives a positive voltagethat is applied to the base of transistor 18, whereby transistor 14 isagain rendered in a conductingstate. The cycle is continued repeatedlyin the manner described so that the voltage across load 13 isstabilized. As the load voltage has a tendency to increase and decrease,the interval during which transistor 14 conducts has a tendency todecrease and increase, respectively, whereby regulation is achieved.

While the circuit of FIG. 1 performs satisfactorily, it has a rather lowefficiency; 83.8 percent, being a reasonable value, i.e., 83.8 percentof the power supplied by source 12 to the network is coupled to load 13.Efliciency of the network is effected because current from source 12 isfed through the control network comprised of resistors 19 and 21, aswell as transistor 18, shunted between the negative terminal 11 ofsource 12 and ground. In addition, a significant amount of powersupplied by source 12 to the network is dissipated in heat energy byresistor 21. The amount of heat energy radiated by resistor 21 is lostenergy and reduces overall eificicncy.

According to the present invention, the efliciency of the network ofFIG. I is increased from a typical value of 83.8 percent toapproximately 94 percent by feeding the current from source 12 throughthe switching transistor gating network back to the load and the PRpower dissipation problems associated with resistor 21 are eliminoted.in FIG. 2, the collector of transistor 18 is coupled to load 13 viatransformer 25. The primary winding 26 of transformer 25 is connectedbetween the collector of transistor 14 and load 13 in exactly the samemanner as inductance 15 is connected between the corresponding elementsin FIG. 1.

The secondary winding 27 of transformer 25, however, in addition tobeing inductively coupled to the primary winding 26, provides a D.C.path between the collector of transistor 18 and the junction betweenwinding 26 and the anode of diode 16. The turns ratio of windings 26 and27 is such that a relatively large current in primary winding 26 inducesa fairly small current in secondary winding 27 so that. in a typicalembodiment, N /N is on the order of 53/ 17, wherein N and N are thenumber of turns in transformer windings 26 and 27, respectively. Thestated current ratio is necessary to provide the proper current levelsthrough transistors 14 and 18. The windings of transformers 25 are in adirection so that a negative current flowing into the dotted end ofwinding 26 induces a negative current into winding 27 and vice versa.Hence, in response to transistor 18 being rendered conductive, wherebynegative current flows from its collector to the dotted end of winding27, there is induced in winding. 26 a negative current that tiows toload 13 in aiding relationship to the current applied to the load bysource 12 via transistor 14.

It is desirable to connect the collector of transistor 18 to load 13through transformer 25, rather than connect the collector directly tothe load because the transformer isolates the impedance and voltagelevels of load 13 from the collector of transistor 18.

In operation, during thelinterval when a positive voltage is derived byvoltageto duty-cycle network 23, the circuit of F10. 2 enables currentfrom source 12 to be applied to load 13 through transistors 14 and 18.Current is coupled to load 13 vla transformer 14 in precisely the samemannerindicated, supra, in coniunction with FIG. 1. Current from source12 passes'through resistor 19 and the emitter collector path oftransistor 18 to winding 27. The

current supplied throughwinding 27 induces a current in winding 26, inaiding relationship with the current therein from source 12,.wherebyloadimpedance 13 is supplied by the inductance through load 13 and thecathode-anode with current from bothtransistors 14 and 18. Hence, the

efiiciency of the network of FIG. 2 is greater than the circuit of FIG.I because substantially all of the current supplied to gating transistor18 is coupled to load 13. Heat dissipation in the circuit of FIG. 2 isdecreased relative to the heat dissipated in the network of FIG. 1because the former circuit has a relatively low D.C. impedance in thecollector path of gating transistor 18. The relatively low D.C.impedance in the collector of transistor 18 occurs because windings 26and 27 have a considerably lower resistance than resistor 21.

In the circuit of FIG. 2, the voltage across winding 26 reverses inphase during the interval when transistors 14 and 18 are cut off. Inconsequence, negative current flows from winding 26 through load 13 andthe cathode-anode path of diode 16. In response to the current flowingin winding 26, there is induced in winding 27 a negative current thatflows out of the collector of transistor 18. Since the emitter currentof gating transistor 18 is zero, during the interval being considered,winding 27 supplies the gating transistor with a finite emitter cut-offcollector current. Because a finite fiows out of the collector oftransistor 18 during the interval when the emitter collector path of thetransistor is cut off, the transistor is more rapidly switched from thenon-conducting to the conducting state in response to network 23switching from a negative to a positive output voltage. Rapid switchingof transistor 18 enables the regulator to maintain the voltage acrossload 13 to within the desired level with great accuracy.

Another feature of the network of FIG. 2 is that the collectoremitter'saturation voltage of transistor 14 is maintained at arelatively low, constant level despite varying currents being suppliedto load 13. The emitter collcctor saturation voltage of transistor 14 ismaintained constant because the collector voltage of transistor 18varies with load current through winding 26. Increases and decreases inthe current through winding 26 are reflected as increased and decreasedcurrents, respectively, in the collector of transistor 18. As thecollector current of transistor 18 varies, the voltage drop acrossresistor 19 varies in a like manner, whereby the base forward bias oftransistor 14 is increased and decreased as the collcctor current oftransistor 14 becomes greater and smaller, respectively. In consequence,the emitter collector impedance of switching transistor 14 decreaseswhile the current through the transistor increases, or vice versa, andthe saturation voltage of the switching transistor is maintainedconstant. In contrast, in the embodiment of FIG. 1, the current throughresistor 19 is maintained constant during each conducting interval oftransistor 18. Hence, a constant forward bias is applied to the base oftransistor 14 during each conducting cycle thereof and the impedancebetween the emitter and collector remains constant so that increases inthe current supplied to load 13 result in a greater voltage drop betweenthe emitter and collector of the switched transistor.

Reference is now made to FIG. 3 of the drawings wherein a modificationof the network of FIG. 2 is illustrated. in the circuit of FIG. 3.transformer 25 is replaced by attic-transformer 28, connected betweenthe collector of transistor 14 and load 13. Autotransformer 28 includestap 29, connected in D.C. circuit with the collector of transistor 18.Tap 29 is positioned on autotransformer 28 so that an appropriate amountof the voltage developed across the autotransformer is fed to thecollector of transistor 18. Hence, the emitter collector path oftransistor 18 is supplied with approximately 2 percent of the currentsupplied to the emitter collector path of transistor 14 to maintain theappropriate current levels in the control and switching transistors,respectively.

The network of FIG. 3 functions in a manner very similar to the circuitof FIG. 2 in that: substantially all of the current supplied to theemitter collector path of transistor 18 from source 12 is fed to load13; a relatively small D.C. impedance appears in the collector networkof transistor 18; and the saturation voltage of transistor 14 betweenits emitter and collector is maintained substantially constant withsubstantial changes in the current supplied to load 13. In addition,inductance 28 and tap 29 maintain a low current level in the collectorof transistor 18 when the emitter cur'r'r'tt thereof is cut off. Hence,the network of FIG. 3 includes many of the advantages of the circuit ofFIG. 2, without the complexity, weight and expense of a two-coiltransformer having a relatively large core.

While I have described several specific embodiments of my invention, itwill be clear that variations of the details of construction which arespecifically illustrated and described may be made without departingfrom the true spirit and scope of the invention as defined in appendedclaims.

I claim:

1. A series regulator circuit for feeding power from a D.C. source to aload comprising:

(A) a D.C. path for feeding current from said source to said lead,

(1) said path including the emitter collector path of a transistor inseries circuit with an isolating impedance,

(2) said isolating impedance being connected between said transistor andsaid load and comprising an inductive winding connected in seriesbetween said transistor and the load;

(B) a transistor gate control circuit responsive to a source of gatingvoltage,

(I) said control circuit selectively driving the emitter collector pathof said transistor between conducting and nonconducting states;

(C) means for feeding said control circuit with power only from saidsource; and

(D) means for coupling said control circuit to said impedance so thatsubstantially all of the current fed to said control circuit from saidsource is fed to said impedance, said means for coupling comprising aD.C. connection from said control circuit to a tap on said winding.

2. A series regulator circuit for feeding power from a D.C. source to aload comprising:

(A) a D.C. path for feeding current from said source to said lead,

(1) said path including the emitter collector path of a transistor inseries circuit with an isolating impedance,

(2) said isolating impedance being connected between said transistor andsaid load and comprising an inductive winding connected in seriesbetween said transistor and the load;

(B) a transistor gate control circuit responsive to a source of gatingvoltage,

(1) said control circuit selectively driving the emitter collector pathof said transistor between conducting and nonconducting states;

(C) means for feeding said control circuit with power only from saidsource; and

(D) means for coupling said control circuit to said impedance so thatsubstantially all of the current fed to said control circuit from saidsource is fed to said impedance, said means for coupling comprisinganother winding inductively coupled to said first named winding, saidanother winding being connected to induce current from said controlcircuit into said first named winding.

3. The regulator of claim 2 wherein the relative directions of saidwindings are such that the current induced in the first named winding bysaid another winding aids the current flowing in the first named windingfrom said source and transistor.

4. The regulator of claim 3 wherein one end of the said another windingis connected to said control circuit and the other end is connected to-ajunction between said first named winding and said transistor.

7 8 5. The regulator of claim 4 wherein said control circuit (D) meansfor connecting said second transistor to includes means for deriving asignal indicative of the cursaid winding whereby said second transistorderives rent supplied to said load; and means for applying said a signalindicative of the current supplied to said signal to said transistor tomaintain the voltage across load; and said transistor, during theinterval when it is conducting, (E) means connected to said secondtransistor for substantially constant as the current flowing through itopening and closing the emitter collector path of es. said firsttransistor in response to the emitter collector 6. A series regulatorfor feeding power from a D.C. path of said second transistor beingopened and source to a load comprising: closed, respectively, andapplying said signal to said (A) a D.C. path for feeding current fromsaid source 10 first transistor to maintain the voltage across said tosaid load, first transistor substantially constant during the in- (I)said path including the emitter collector path terval when it isconducting, as the current flowing of a first transistor in series withan isolating through it varies. impedance, (2) said impedance being aninductive winding Reference-1 C ted connected between said transistorand saitilload; n- STATES PATENTS (B) a second transistor having itsemitter co ector path connected to be responsive to current from said gp "5 7 source and supplying substantially all of the current to m et afed to it by said source of said impedance; 8 10/1967 ct 3 3 4 33681392/1968 Wuerilem 323-22 (C) means for selectively opening and closing theemitter collector path of said second transistor, said LEE T Hlx PrimExaminer means comprising a variable duty-cycle network rey sponsive tothe voltage across the load whereby the A PEU-INEN, Assisi!!! durationof the duty-cycle derived by said network 25 U5. CL varies in responseto said voltage;

